EP2SGX60CF780C4N 600Mb/S 364 I/O Stratix II GX
Brand Name:Intel / Altera
Certification:Lead free / RoHS Compliant
Model Number:EP2SGX60CF780C4N
Minimum Order Quantity:1 pcs
Delivery Time:3-5 Day
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EP2SGX60CF780C4N ALTERA FPGA Chip FBGA-780 Stratix II GX
| Product Attribute | Attribute Value |
|---|---|
| Intel | |
| FPGA - Field Programmable Gate Array | |
| Stratix II GX | |
| 60440 | |
| 3022 | |
| 364 I/O | |
| 1.2 V | |
| 0 C | |
| + 70 C | |
| SMD/SMT | |
| FBGA-780 | |
| Tray | |
| Data Rate: | 600 Mb/s to 6.375 Gb/s |
| Series: | Stratix II GX EP2SGX60C |
| Brand: | Intel / Altera |
| Moisture Sensitive: | Yes |
| Number of Transceivers: | 4 Transceiver |
| Operating Supply Current: | 500 mA |
| Product Type: | FPGA - Field Programmable Gate Array |
| Factory Pack Quantity: | 36 |
| Subcategory: | Programmable Logic ICs |
| Total Memory: | 2544192 bit |
| Tradename: | Stratix II GX |
| Part # Aliases: | 973084 |
This section lists the Stratix II GX device features.
■ Main device features:
● TriMatrix memory consisting of three RAM block sizes to implement true dual-port memory and first-in first-out (FIFO)
buffers with performance up to 550 MHz
● Up to 16 global clock networks with up to 32 regional clock networks per device region
● High-speed DSP blocks provide dedicated implementation of multipliers (at up to 450 MHz), multiply-accumulate functions,
and finite impulse response (FIR) filters
● Up to four enhanced PLLs per device provide spread spectrum, programmable bandwidth, clock switch-over, real-time PLL
reconfiguration, and advanced multiplication and phase shifting
● Support for numerous single-ended and differential I/O standards
● High-speed source-synchronous differential I/O support on up to 71 channels
● Support for source-synchronous bus standards, including SPI-4 Phase 2 (POS-PHY Level 4), SFI-4.1, XSBI, UTOPIA IV, NPSI,
and CSIX-L1
● Support for high-speed external memory, including quad data rate (QDR and QDRII) SRAM, double data rate (DDR and
DDR2) SDRAM, and single data rate (SDR) SDRAM
● TriMatrix memory consisting of three RAM block sizes to implement true dual-port memory and first-in first-out (FIFO)
buffers with performance up to 550 MHz
● Up to 16 global clock networks with up to 32 regional clock networks per device region
● High-speed DSP blocks provide dedicated implementation of multipliers (at up to 450 MHz), multiply-accumulate functions,
and finite impulse response (FIR) filters
● Up to four enhanced PLLs per device provide spread spectrum, programmable bandwidth, clock switch-over, real-time PLL
reconfiguration, and advanced multiplication and phase shifting
● Support for numerous single-ended and differential I/O standards
● High-speed source-synchronous differential I/O support on up to 71 channels
● Support for source-synchronous bus standards, including SPI-4 Phase 2 (POS-PHY Level 4), SFI-4.1, XSBI, UTOPIA IV, NPSI,
and CSIX-L1
● Support for high-speed external memory, including quad data rate (QDR and QDRII) SRAM, double data rate (DDR and
DDR2) SDRAM, and single data rate (SDR) SDRAM
EP2SGX60CF780C4N 600Mb/S 364 I/O Stratix II GX
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