Overload Protection LNBH26SPQR LPM PMIC Power Management

LNBH26SPQR Power Management Specialized - PMIC POWER MANAGEMENT

1.Features

mplete interface between LNB and I²C bus
• Built-in DC-DC converter for single 12 V supply operation and high efficiency(typ. 93% @ 0.5 A)
• Selectable output current limit by external resistor
• Compliant with main satellite receiver output voltage specification (15programmable levels)
• Accurate built-in 22 kHz tone generator suits widely accepted standards
• 22 kHz tone waveform integrity guaranteed at no-load condition as well
• Low drop post regulator and high efficiency step-up PWM with integrated powerNMOS allowing low power losses
LPM function (low power mode) to reduce dissipation
• Overload and overtemperature internal protection with I²C diagnostic bits
• LNB short-circuit dynamic protection
• +/- 4 kV ESD tolerant on output power pins

2.Applications

TB satellite receivers
TV satellite receivers
PC card satellite receivers

3.Block diagram

4.Application information (valid for each section A/B)

The LNBH26S includes two completely independent sections. Except for ISEL, VCC and I²C inputs, each circuitcan be separately controlled and have their independent external components. All the specifications below mustbe considered equal for both sections (A/B).This IC has a built-in DC-DC step-up converter that, from a single source (8 V to 16 V), generates the voltages(VUP) that let the integrated LDO post-regulator (generating the 13 V / 18 V LNB output voltages plus the 22 kHzDiSEqC™ tone) work with a minimum dissipated power of 0.5 W typ. @ 500 mA load (the LDO drop voltage isinternally kept at VUP - VOUT = 1 V typ.). The LDO power dissipation can be further reduced when 22 kHz toneoutput is disabled by setting the LPM bit to “1” (see LPM function description). The IC is also provided with anundervoltage lockout circuit that disables the whole circuit when the supplied VCC drops below a fixed threshold(4.7 V typ.). The step-up converter soft-start function reduces the in-rush current during startup. The SS time isinternally fixed at 4 ms typ. to switch from 0 to 13 V, and 6 ms typ. to switch from 0 to 18 V

5.DISEQC™ data encoding (DSQIN pin)

The internal 22 kHz tone generator is factory trimmed in accordance with the DiSEqC™ standards, and can beactivated in 3 different ways:
1. by an external 22 kHz source DiSEqC™ data connected to the DSQIN logic pin (TTL compatible). In thiscase the I²C tone control bits must be set: EXTM=TEN=1.
2. by an external DiSEqC™ data envelope source connected to the DSQIN logic pin. In this case the I²C tonecontrol bits must be set: EXTM=0 and TEN=1.
3. through the TEN I²C bit if the 22 kHz presence is requested in continuous mode. In this case the DSQIN TTLpin must be pulled HIGH and the EXTM bit set to “0”.
Each of the above solutions requires that during the 22 kHz tone activation and/or DiSEqC™ data transmission,the LPM bit must be set to “0”

6.Data encoding by external 22 kHz tone TTL signal

In order to improve design flexibility an external tone signal can be input to the DSQIN pin by setting the EXTM bitto “1”.
The DSQIN is a logic input pin which activates the 22 kHz tone to the VOUT pin, by using the LNBH26S integratedtone generator.
The output tone waveforms are internally controlled by the LNBH26S tone generator in terms of rise/fall time andtone amplitude, while, the external 22 kHz signal on the DSQIN pin is used to define the frequency and the dutycycle of the output tone. A TTL compatible 22 kHz signal is required for the proper control of the DSQIN pinfunction. Before sending the TTL signal on the DSQIN pin, the EXTM and TEN bits must be previously set to “1”.As soon as the DSQIN internal circuit detects the 22 kHz TTL external signal code, the LNBH26S activates the 22kHz tone on the VOUT output with about 1 μs delay from TTL signal activation, and it stops with about 60 μs delayafter the 22 kHz TTL signal on DSQIN has expired, refer to Figure 2. Tone enable and disable timing (usingexternal waveform).

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