XC5VLX50-2FF1153I 560 I/O Xilinx Virtex 5
Brand Name:Xilinx Inc.
Certification:Lead free / RoHS Compliant
Model Number:XC5VLX50-2FF1153I
Minimum Order Quantity:1 pcs
Delivery Time:3-5 Day
Payment Terms:T/T, Western Union, Paypal, Trade Assurance, Credit Card
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R1811, B Bldg, Jiahe Tower, No.3006 Shennan Mid Rd, Shenzhen, China
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Product Details
XC5VLX50-2FF1153I IC FPGA FBGA-1153 560 I/O Virtex-5
| Product Attribute | Attribute Value |
|---|---|
| Xilinx | |
| FPGA - Field Programmable Gate Array | |
| Virtex-5 | |
| 560 I/O | |
| 1 V | |
| - 40 C | |
| + 100 C | |
| SMD/SMT | |
| FBGA-1153 | |
| Series: | XC5VLX50 |
| Brand: | Xilinx |
| Distributed RAM: | 480 kbit |
| Embedded Block RAM - EBR: | 1728 kbit |
| Maximum Operating Frequency: | 550 MHz |
| Moisture Sensitive: | Yes |
| Product Type: | FPGA - Field Programmable Gate Array |
| Factory Pack Quantity: | 1 |
| Subcategory: | Programmable Logic ICs |
| Tradename: | Virtex |
Summary of Virtex-5 FPGA Features
• System Monitoring capability on all devices
− On-chip/Off-chip thermal monitoring
− On-chip/Off-chip power supply monitoring
− JTAG access to all monitored quantities
• Integrated Endpoint blocks for PCI Express Designs
− LXT, SXT, TXT, and FXT Platforms
− Compliant with the PCI Express Base Specification 1.1
− x1, x4, or x8 lane support per block
− Works in conjunction with RocketIO™ transceivers
• Tri-mode 10/100/1000 Mb/s Ethernet MACs
− LXT, SXT, TXT, and FXT Platforms
− RocketIO transceivers can be used as PHY or connect to external PHY using many soft MII (Media Independent Interface) options
• RocketIO GTP transceivers 100 Mb/s to 3.75 Gb/s
− LXT and SXT Platforms
• RocketIO GTX transceivers
• Advanced DSP48E slices
− 25 x 18, two’s complement, multiplication
− Optional adder, subtracter, and accumulator
− Optional pipelining
− Optional bitwise logical functionality
− Dedicated cascade connections
• Flexible configuration options
− SPI and Parallel FLASH interface
− Multi-bitstream support with dedicated fallback reconfiguration logic
− Auto bus width detection capability
− On-chip/Off-chip thermal monitoring
− On-chip/Off-chip power supply monitoring
− JTAG access to all monitored quantities
• Integrated Endpoint blocks for PCI Express Designs
− LXT, SXT, TXT, and FXT Platforms
− Compliant with the PCI Express Base Specification 1.1
− x1, x4, or x8 lane support per block
− Works in conjunction with RocketIO™ transceivers
• Tri-mode 10/100/1000 Mb/s Ethernet MACs
− LXT, SXT, TXT, and FXT Platforms
− RocketIO transceivers can be used as PHY or connect to external PHY using many soft MII (Media Independent Interface) options
• RocketIO GTP transceivers 100 Mb/s to 3.75 Gb/s
− LXT and SXT Platforms
• RocketIO GTX transceivers
• Advanced DSP48E slices
− 25 x 18, two’s complement, multiplication
− Optional adder, subtracter, and accumulator
− Optional pipelining
− Optional bitwise logical functionality
− Dedicated cascade connections
• Flexible configuration options
− SPI and Parallel FLASH interface
− Multi-bitstream support with dedicated fallback reconfiguration logic
− Auto bus width detection capability
XC5VLX50-2FF1153I 560 I/O Xilinx Virtex 5
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