The 74HC4094; 74HCT4094 is an 8-bit serial-in/serial or
parallel-out shift register with a storage register and 3-state
outputs.
Both the shift and storage register have separate clocks. The
device features a serial input (D) and two serial outputs (QS1 and
QS2) to enable cascading. Data is shifted on the LOW-to-HIGH
transitions of the CP input. Data is available at QS1 on the
LOW-to-HIGH transitions of the CP input to allow cascading when
clock edges are fast. The same data is available at QS2 on the next
HIGH-to-LOW transition of the CP input to allow cascading when
clock edges are slow. The data in the shift register is transferred
to the storage register when the STR input is HIGH. Data in the
storage register appears at the outputs whenever the output enable
input (OE) is HIGH. A LOW on OE causes the outputs to assume a
high-impedance OFF-state. Operation of the OE input does not affect
the state of the registers. Inputs include clamp diodes. This
enables the use of current limiting resistors to interface inputs
to voltages in excess of VCC.
