Q30 FPGA Core Iris Chip – Single-Chip Solution for Iris Recognition and Matching with Strong Encoding & Matching Capability

Brand Name:HOMSH
Certification:ISO9001
Model Number:Q30
Minimum Order Quantity:1
Delivery Time:5-9day
Payment Terms:T/T
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Location: Wuhan Hubei China
Address: 9 / F, Building C1, Future Science and Technology City, 999 Gaoxin Avenue, Donghu High-tech Zone, Wuhan City, Hubei Province
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Product Details

Q30 FPGA Core Iris Chip – Single-Chip Solution for Iris Recognition and Matching with Strong Encoding & Matching Capability

Product Overview

The Q30 chip takes Homsh Technology’s PhaseIrisTM 3rd-generation iris hard-core engine technology as its core, providing a single-chip solution for iris recognition and matching applications. It offers ultra-strong iris encoding capability and matching computing capability, making it suitable for scenarios requiring high-performance iris biometrics.

Performance Features

1. Core Acceleration Technology: Adopts PhaseIris Gen3 iris hard-core acceleration technology (speed-priority mode) for efficient and fast iris data processing.

2. Interface Support:

Provides GPIO/IIC/Master FIFO interfaces externally.

Master FIFO Interface: Supports external bridge USB controllers (such as USB68013, USB3014/2014, FT2232/FT600); supports external MCU/ARM controllers; maximum frequency of Master FIFO interface: 100MHz.

3. Camera, ISP & Image Output:

Supports 2 parallel-port camera inputs, with a maximum support of 5 million pixels.

Integrates ISP, supporting functions such as automatic exposure, channel balance, and image cropping.

Supports DVP digital image output, with a maximum of 2 million pixels.

4. High-Speed Matching Performance:

QSPI Flash read template matching: Up to 7,000 templates/s.

When an external USB2.0 interface is connected: Supports real-time transmission template matching, up to 14,000 templates/s.

When an external USB3.0 interface is connected: Supports real-time transmission template matching, up to 40,000 templates/s.

Application Fields

Large-Capacity Access Control: Suitable for access control systems in scenarios with high traffic and large-scale user bases (e.g., enterprise campuses, government buildings).

Small-Scale Iris Matching Servers: Can be used as a core component in small-scale iris matching servers to support fast and accurate iris recognition tasks.

Why Choose Q30?

1. 3rd-Gen Hard-Core Engine Advantage: PhaseIris Gen3 hard-core acceleration technology ensures ultra-strong encoding and matching performance, meeting high-demand application scenarios.

2. Rich Interface & Expansion: Diverse interfaces (GPIO/IIC/Master FIFO/USB/DVP) support flexible integration with cameras, controllers, and image output devices.

3. High-Speed Matching Scalability: Multi-level matching speeds (QSPI Flash/USB2.0/USB3.0) adapt to different data throughput requirements.

4. Integrated ISP & Image Output: Built-in ISP simplifies image preprocessing, and DVP output enables direct digital image transmission, optimizing system design efficiency.

As a professional enterprise in the biometric sector, Wuhan Homsh Technology drives secure authentication through technological innovation. Leveraging proprietary core algorithms, end-to-end technical capabilities, and high-precision hardware expertise, we provide professional support for our full range of biometric products, including iris recognition and vein recognition.

We cater to the needs of global industries like finance and security, offering technical consultation, custom development, and round-the-clock after-sales support. We look forward to partnering with global counterparts to build a secure authentication ecosystem via biometric technology and empower industrial digital upgrading.

Technical Parameters

Parameter and FeatureValue or Support
Chip ModelQ30
False Acceptance Rate (FAR)< 10-7
False Rejection Rate (FRR)< 10-3
Iris Localization Search Area768x768 pixels
Supported Iris Radius Pixel Range60 ~ 160 pixels
Supported Minimum Image Resolution2lp/mm
Encoding Speed50ms per image
Matching SpeedUp to 3.2 million templates/s
Matching EngineSupports Axi4-stream bus interface, 384-bit data width, fully pipelined structure
Algorithm Parameter Register SetReal-time configuration, supports Axi4-lite/apb bus interface
Encoding EngineImage cache supports external shared memory, encoding engine RAM interface width configurable as 32/16/8-bit, interface mode: master
Iris Localization
Liveness Detection
Iris Clarity Assessment
Iris Segmentation
2D Image Transformation
Feature Extraction
Iris Matching

China Q30 FPGA Core Iris Chip – Single-Chip Solution for Iris Recognition and Matching with Strong Encoding & Matching Capability supplier

Q30 FPGA Core Iris Chip – Single-Chip Solution for Iris Recognition and Matching with Strong Encoding & Matching Capability

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