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Part No. | Quantity | Brand | D/C | Package |
H11G1SR2M | 3977 | FAIRCHILD | 10+ | SOP-6 |
H11L1SR2M | 14256 | FAIRCHILD | 16+ | SOP |
H1260NL | 10280 | PULSE | 15+ | SMD |
HA17324 | 3948 | RENESAS | 14+ | DIP-14 |
HA17324ARPEL-E-Q | 7361 | RENESAS | 15+ | SOP-14 |
HCF4051BEY | 3919 | ST | 16+ | DIP |
HCF4052M013TR | 7598 | ST | 13+ | SOP-16 |
HCF4060BE | 18658 | ST | 14+ | DIP |
HCNR200 | 6587 | AVAGO | 15+ | DIPSOP |
HCNR200-000E | 7432 | AVAGO | 15+ | DIP |
HCNW2611-000E | 5720 | AVAGO | 16+ | DIP-8 |
HCNW4502 | 6210 | AVAGO | 13+ | SOP |
HCPL-0466 | 3551 | AVAGO | 15+ | SOP-8 |
HCPL-0630 | 15108 | AVAGO | 16+ | SOP-8 |
HCPL-0639 | 5791 | FAIRCHILD | 13+ | SOP-8 |
HCPL-181-000E | 9000 | AVAGO | 16+ | SOP-4 |
HCPL-2602 | 8795 | AVAGO | 16+ | SOP-8 |
HCPL2630SD | 2204 | FSC | 16+ | SOP |
HCPL-2731 | 15179 | AVAGO | 13+ | DIPSOP |
HCPL-3120 | 9870 | AVAGO | 15+ | DIPSOP |
HCPL-316J | 13751 | AVAGO | 12+ | SOP-18 |
HCPL-4504 | 21001 | AVAGO | 16+ | DIPSOP |
HCPL-4506 | 12623 | AVAGO | 14+ | DIP-8 |
HCPL-7840-500E | 5971 | AVAGO | 15+ | SOP |
HCPL-786J | 13822 | AVAGO | 16+ | SOP-16 |
HD06-T | 54000 | DIODES | 15+ | SMD |
HD64F3687FPV | 3168 | RENESAS | 14+ | TQFP-64 |
HD74LS00P | 8647 | RENESAS | 16+ | DIP-14 |
HD74LS04P | 8718 | RENESAS | 13+ | DIP-14 |
HD74LS125P | 8931 | RENESAS | 15+ | DIP |
DM9000A
Ethernet Controller with General Processor Interface
General Description
The DM9000A is a fully integrated and cost-effective low pin count single chip Fast Ethernet controller with a general processor interface, a 10/100M PHY and 4K Dword SRAM. It is designed with low power and high performance process that support 3.3V with 5V IO tolerance.
The DM9000A supports 8-bit and 16-bit data interfaces to internal memory accesses for various processors. The PHY of the DM9000A can interface to the UTP3, 4, 5 in 10Base-T and UTP5 in 100Base-TX with HP Auto-MDIX. It is fully compliant with the IEEE 802.3u Spec. Its auto-negotiation function will automatically configure the DM9000A to take the maximum advantage of its abilities. The DM9000A also supports IEEE 802.3x fullduplex flow control..
Features
■ 48-pin LQFP
■ Supports processor interface: byte/word of I/O command to internal memory data operation
■ Integrated 10/100M transceiver with HP Auto-MDIX
■ Supports back pressure mode for half-duplex mode flow control
■ IEEE802.3x flow control for full-duplex mode
■ Supports wakeup frame, link status change and magic packet events for remote wake up
■ Support 100M Fiber interface.
■ Integrated 16K Byte SRAM
■ Build in 3.3V to 2.5V regulator
■ Supports early Transmit
■ Supports IP/TCP/UDP checksum generation and checking
■ Supports automatically load vendor ID and product ID from EEPROM
■ Optional EEPROM configuration
■ Very low power consumption mode:
– Power reduced mode (cable detection)
– Power down mode
– Selectable TX drivers for 1:1 or 1.25:1 transformers for additional power reduction.
■ Compatible with 3.3V and 5.0V tolerant I/O
Absolute Maximum Ratings ( 25°C )
Symbol | Parameter | Min. | Max. | Unit | Conditions |
DVDD | Supply Voltage | -0.3 | 3.6 | V | |
VIN | DC Input Voltage (VIN) | -0.5 | 5.5 | V | |
VOUT | DC Output Voltage(VOUT) | -0.3 | 3.6 | V | |
Tstg | Storage Temperature range | -65 | +150 | ℃ | |
Tc | Case Temperature | 0 | 85 | ℃ | @Ta=0 ~ 70℃ |
TA | Ambient Temperature | 0 | +70 | ℃ | |
LT | Lead Temperature (TL,soldering,10 sec.). | - | +235 | ℃ | DM9000AE |
LT | Lead Temperature (TL,soldering,10 sec.). | - | +260 | ℃ | DM9000AEP |
Block Diagram
Pin Configuration
(16-bit mode)
(8-bit mode)