S25FL128SAGMFIR01 128Mb SPI NOR Flash 104MHz Clock 100K Erase Cycles 20-Year Data Retention 2.7-3.6V SOIC-16 -40°C to +85°C

Brand Name:Infineon
Certification:CE, GCF, ROHS
Model Number:S25FL128SAGMFIR01
Minimum Order Quantity:1
Delivery Time:3-5 working days after received the payment
Payment Terms:T/T, Western Union,
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S25FL128SAGMFIR01 128Mb SPI NOR Flash 104MHz Clock 100K Erase Cycles 20-Year Data Retention 2.7-3.6V SOIC-16 -40anddeg;C to +85anddeg;C

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Features

andbull; CMOS 3.0V core with versatile I/O

andbull; Serial Peripheral Interface (SPI) with multi-I/O

- SPI clock polarity and phase modes 0 and 3

- DDR option

- Extended addressing: 24- or 32-bit address options

- Serial command set and footprint compatible with S25FL-A, S25FL-K, and S25FL-P SPI families

- Multi I/O command set and footprint compatible with S25FL-P SPI family

andbull;Read commands

- Normal, Fast, Dual, Quad, Fast DDR, Dual DDR, Quad DDR

- AutoBoot andndash; Power up or reset and execute a Normal or Quad read command automatically at a preselected address

- Common Flash Interface (CFI) data for configuration information

andbull; Programming (1.5 MBps)

- 256- or 512-byte page programming buffer options

- Quad-input page programming (QPP) for slow clock systems

- Automatic ECC-internal hardware error correction code generation with single-bit error correction

andbull; Erase (0.5 to 0.65 MBps)

- Hybrid sector size option andndash; Physical set of thirty two 4-KB sectors at top or bottom of address space with all remaining sectors of 64 KB, for compatibility with prior generation S25FL devices

- Uniform sector option andndash; always erase 256-KB blocks for software compatibility with higher density and future devices

andbull;Cycling endurance

- 100,000 program-erase cycles, minimum

andbull;Data retention

- 20 year data retention, minimum

andbull; Security features

- One-time programmable (OTP) array of 1024 bytes

-Block protection

andbull; Status Register bits to control protection against program or erase of a contiguous range of sectors

andbull; Hardware and software control options

- Advanced sector protection (ASP)

andbull; Individual sector protection controlled by boot code or password

andbull; 65-nm MIRRORBITandtrade; technology with Eclipse architecture

andbull; Core supply voltage: 2.7 V to 3.6 V

andbull; I/O supply voltage: 1.65 V to 3.6 V

- SO16 and FBGA packages

andbull; Temperature range/grade:

- Industrial (-40anddeg;C to +85anddeg;C)

- Industrial Plus (-40anddeg;C to +105anddeg;C)

- Automotive AEC-Q100 grade 3 (-40anddeg;C to +85anddeg;C)

- Automotive AEC-Q100 grade 2 (-40anddeg;C to +105anddeg;C)

- Automotive AEC-Q100 grade 1 (-40anddeg;C to +125anddeg;C)

andbull; Packages (all Pb-free)

- 16-lead SOIC (10.30 andtimes; 7.50 andtimes; 2.65 mm) (300 mil)

- 8-lead DFN (6.0 andtimes; 8.0 andtimes; 0.8 mm) (WSON)

- 24-ball FBGA (8.0 andtimes; 6.0 andtimes; 1.2 mm)

andbull; 5 andtimes; 5 ball (FAB024) and 4 andtimes; 6 ball (FAC024) footprint options

andbull; Known good die (KGD) and known tested die

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General description

The Infineon S25FL128S and S25FL256S devices are flash non-volatile memory products using:

andbull; MIRRORBITandtrade; technology andndash; that stores two data bits in each memory array transistor

andbull; Eclipse architecture andndash; that dramatically improves program and erase performance

andbull; 65-nm process lithography

This family of devices connect to a host system via a SPI. Traditional SPI single bit serial input and output (Single I/O or SIO) is supported as well as optional two bit (Dual I/O or DIO) and four bit (Quad I/O or QIO) serial commands. This multiple width interface is called SPI Multi-I/O or MIO. In addition, the FL-S family adds support for DDR read commands for SIO, DIO, and QIO that transfer address and read data on both edges of the clock.

The Eclipse architecture features a Page Programming Buffer that allows up to 128 words (256 bytes) or 256words (512 bytes) to be programmed in one operation, resulting in faster effective programming and erase than prior generation SPI program or erase algorithms.

Executing code directly from flash memory is often called eXecute-in-Place or XIP. By using FL-S devices at the higher clock rates supported, with QIO or DDR-QIO commands, the instruction read transfer rate can match or exceed traditional parallel interface, asynchronous, NOR flash memories while reducing signal count dramati cally.

The S25FL128S and S25FL256S products offer high densities coupled with the flexibility and fast performance required by a variety of embedded applications. They are ideal for code shadowing, XIP, and data storage.

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INFORMATION

Category
Mfr
Series
Packaging
Tube
Part Status
Active
DigiKey Programmable
Not Verified
Memory Type
Non-Volatile
Memory Format
Technology
FLASH - NOR
Memory Size
Memory Organization
16M x 8
Memory Interface
SPI - Quad I/O
Clock Frequency
133 MHz
Write Cycle Time - Word, Page
-
Voltage - Supply
2.7V ~ 3.6V
Operating Temperature
-40anddeg;C ~ 85anddeg;C (TA)
Mounting Type
Surface Mount
Package / Case
Supplier Device Package
16-SOIC
Base Product Number

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Drawing

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Our advantage :

  • High quality products --- our offers are 100% new and original, ROHS
  • Competitive price --- good Purchase channels with good price.
  • Professional service --- strict quality testing before the shipment, and perfect after-sales service after the purchase.
  • Adequate inventory --- With the support of our strong Purchasing team,
  • Fast delivery --- we will ship the goods within 1-3 working days after the payment confirmed.

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China S25FL128SAGMFIR01 128Mb SPI NOR Flash 104MHz Clock 100K Erase Cycles 20-Year Data Retention 2.7-3.6V SOIC-16 -40°C to +85°C supplier

S25FL128SAGMFIR01 128Mb SPI NOR Flash 104MHz Clock 100K Erase Cycles 20-Year Data Retention 2.7-3.6V SOIC-16 -40°C to +85°C

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