S4804CBI30 - Applied Micro Circuits Corporation - OC-48 / 4xOC-12 / 16xOC-3 SONET/SDH FRAMER AND POS/ATM MAPPER

Quick Detail:

OC-48 / 4xOC-12 / 16xOC-3 SONET/SDH FRAMER AND POS/ATM MAPPER

Description:

The S4804 is a highly-integrated VLSI device that provides full-duplex mapping of packets or ATM cells to SONET/SDH payloads. It provides support for both uni-directional and bi-directional rings.

The S4804 provides full section, line, and path overhead processing, and supports framing, scrambling/descrambling, alarm signal insertion/detection, and bit-interleaved parity (B1/B2/B3) processing.

The S4804 is SONET/SDH standards compliant with Bellcore

GR-253, ITU G.707, ITU-T 432.1, ANSI T1.105 -1995, and IETF RFCs 1619/1661/1662/2615.

A general purpose 8-bit or 16-bit microprocessor interface is provided for control and monitoring. The interface supports both IntelTM and MotorolaTM type microprocessors, and is capable of operating in either an interrupt-driven or polled-mode configuration. In addition, a standard 5 signal IEEE 1149.1 JTAG Test Port is provided for Boundary Scan test purposes.

Applications:

• Provides a SONET/SDH STS-48/STM-16, 4 STS-12/STM- 4, or 16 STS-3/STM-1 line interfaces.

• STS-48/STM-16 data stream supports a single STS-48c/ AU-4-16c, or any valid combination of STS-12c/AU-4-4c and/or STS-3c/AU-4 SONET/SDH payloads.

• Each STS-12/STM-4 data stream supports a single STS- 12c/AU-4-4c or 4 STS-3c/AU-4 SONET/SDH payloads.

• Each STS-3/STM-1 data stream supports a single STS-3c/AU-4 SONET/SDH payload.

• Supports mixed STS-3 / STS-12 line rates

• Provides full-duplex mapping of ATM cells or packets in each payload tributary.

• Supports termination of mixed ATM and POS tributaries.

• Terminates/generates SONET/SDH section, line, and path layers with transport/section E1, E2, F1, and DCC overhead interfaces in both transmit and receive directions.

• APS port to support protection-switching configurations between two RHINE devices.

• 16-bit, bus interface at 155 MHz for STS-48/STM-16 mode, or serial interfaces operating at 622/155 MHz for STS-12/3 (STM-4/1) modes on the line side.

• 32-bit, parallel interface (FlexBus-3TM) operating at 100 MHz on the system side.

• 25 micron, 2.5V core, and 3.3V tolerant I/O.

• Packaged in a 624 Pin CBGA.

Specifications:

Competitive Advantage:

Warranty :180 days !
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(goods weight below 3Kg) ,during 20130901-20130930 .
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